The project aims to control the robustness levels of components, subsystems and systems subject to electrical over stress ("electrical over stress" or "EOS") to make components and systems more robust and reliable in the future. their design, manufacture and use. To this end, the project proposes standardized test methods and has them adopted by international standards bodies such as JEDEC.
Rapport final : 7
Member partner
No member partner
NXP SEMICONDUCTORS
RENAULT
LABORATOIRE IRSEEM
LABORATOIRE LAMIPS
VALEO
Start of the project on01 / 04 / 2011 | End of project on01 / 04 / 2015
Strategic business lines
Matériaux et composants pour l'électronique
Referent of the project
07 86 53 38 70
nicolas.pousset-s2e2-ext@st.com
Centre-Val de loire
